AMD M56 Reference Manual page 325

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Field Name
DVOA_CRC_SIG_BLUE_MASK
DVOA_CRC_SIG_GREEN_MASK
Select which data the CRC calculation is performed on.
Field Name
DVOA_CRC_SIG_RED_MASK
DVOA_CRC_SIG_CONTROL_MASK
Select which control signals the CRC calculation is performed on.
Field Name
DVOA_CRC_SIG_BLUE (R)
DVOA_CRC_SIG_GREEN (R)
DVOA Data CRC Results
Field Name
DVOA_CRC_SIG_RED (R)
DVOA_CRC_SIG_CONTROL (R)
DVOA DATA and Control CRC Results
Field Name
DVOA_CRC2_SIG_MASK
Control for secondary DVO CRC
Field Name
DVOA_CRC2_SIG_RESULT (R)
CRC2 signature value for DVO output
© 2007 Advanced Micro Devices, Inc.
Proprietary
DVOA_CRC_SIG_MASK1 - RW - 32 bits - DISPDEC:0x799C
Bits
7:0
23:16
DVOA_CRC_SIG_MASK2 - RW - 32 bits - DISPDEC:0x79A0
Bits
7:0
18:16
DVOA_CRC_SIG_RESULT1 - RW - 32 bits - DISPDEC:0x79A4
Bits
7:0
23:16
DVOA_CRC_SIG_RESULT2 - RW - 32 bits - DISPDEC:0x79A8
Bits
7:0
18:16
DVOA_CRC2_SIG_MASK - RW - 32 bits - DISPDEC:0x79AC
Bits
26:0
DVOA_CRC2_SIG_RESULT - RW - 32 bits - DISPDEC:0x79B0
Bits
26:0
DVOA_STRENGTH_CONTROL - RW - 32 bits - DISPDEC:0x79B4
Default
0xff
Mask bits for DVO B channel CRC.
0xff
Mask bits for DVO G channel CRC.
Default
0xff
Mask bits for DVO R channel CRC.
0x7
Mask bits for DVO control signal CRC
Bit 18: Vsync signal
Bit 17: Hsync Signal
Bit 16: Data Enable
Default
0x0
CRC signature value for DVO B channel CRC.
0x0
CRC signature value for DVO G channel CRC.
Default
0x0
CRC signature value for DVO R channel CRC.
0x0
CRC signature value for DVO control CRC.
Default
0x7ffffff
Mask bits for DVO output CRC2
Bit 26: Vsync signal
Bit 25: Hsync Signal
Bit 24: Data Enable
Bit 23-0:DVO Data
Default
0x0
CRC2 signature value for DVO output
Display Output Registers
Description
Description
Description
Description
Description
Description
M56 Register Reference Manual
2-319

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