Modifying The Example Design - Altera Cyclone V User Manual

Chapter 2: Getting Started

Modifying the Example Design

Modifying the Example Design
To use this example design as the basis of your own design, replace the Chaining
DMA Example shown in
create a Root Port BFM driver to generate the transactions needed to test your
Application Layer.
.
Figure 2–7. Testbench for PCI Express
PCB
Altera FPGA
PCB
APPS
Chaining DMA
(User Application)
npor
Reset
Transceiver
Reconfiguration
to and from
Controller
Embedded
Controller
S
(Avalon-MM
slave interface)
November 2011 Altera Corporation
Figure 2–7 with your own Application Layer design. Then,
DUT
Hard IP for PCI Express
PHY IP Core for PCI Express
Transceiver Bank
Lane 4
Lane 3
Reconfig
Lane 2
to and from
Transceiver
Lane 1
TX PLL
Lane 0
Transaction Layer
Data Link Layer
PHY MAC Layer
x4 PCIe Link
(Physical Layer)
Root
Port
BFM
Cyclone V Hard IP for PCI Express
2–19
User Guide