Altera Cyclone V User Manual page 42

3–10
Link
Table 3–12
Table 3–11. Link 0x090
Parameter
Data link layer active
reporting
Surprise down
reporting
MSI
Table 3–12
Table 3–12. MSI and MSI-X Capabilities 0x050–0x05C,
Parameter
MSI messages
requested
MSI-X
Table 3–12
Table 3–13. MSI and MSI-X Capabilities
Parameter
Implement MSI-X
Table size
0x068[26:16]
Table Offset
Table BAR Indicator
Pending Bit Array
(PBA) Offset
PBA BAR Indicator
(BIR)
Cyclone V Hard IP for PCI Express
describes the Link Capabilities register parameters.
Value
Turn On this option for a downstream port, if the component supports the optional
capability of reporting the DL_Active state of the Data Link Control and
Management State Machine. For a hot-plug capable downstream port (as
On/Off indicated by the Hot-Plug Capable field of the Slot Capabilities register),
this option must be turned On. For upstream ports and components that do not
support this optional capability, turn Off this option. This parameter is only
supported in Root Port mode.
When this option is On, a downstream port supports the optional capability of
On/Off detecting and reporting the surprise down error condition. This parameter is only
supported in Root Port mode.
describes the MSI Capabilities register parameters.
Value
Specifies the number of messages the Application Layer can request. Sets the
1, 2, 4,
value of the Multiple Message Capable field of the Message Control
8, 16
register, 0x050[31:16].
describes the MSI-X Capabilities register parameters.
0x068–0x06C
Value
On/Off When On, enables the MSI-X functionality.
System software reads this field to determine the MSI-X Table size <n>, which is
[10:0] encoded as <n–1>. For example, a returned value of 2047 indicates a table size of
2048. This field is read-only. Legal range is 0–2047 (2
Points to the base of the MSI-X Table. The lower 3 bits of the table BAR indicator
[31:3] (BIR) are set to zero by software to form a 32-bit qword-aligned offset. This field is
read-only. Legal range is 0–2
Specifies which one of a function's BARs, located beginning at 0x10 in
<5–1>:0 Configuration Space, is used to map the MSI-X table into memory space. This field
is read-only. Legal range is 0–5.
Used as an offset from the address contained in one of the function's Base
Address registers to point to the base of the MSI-X PBA. The lower 3 bits of the
31:3
PBA BIR are set to zero by software to form a 32-bit qword-aligned offset. This
field is read-only. Legal range is 0–2
Indicates which of a function's Base Address registers, located beginning at 0x10
<5–1>:0 in Configuration Space, is used to map the function's MSI-X PBA into memory
space. This field is read-only. Legal range is 0–5.
Chapter 3: Parameter Settings
Description
Description
Description
11
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November 2011 Altera Corporation
Port Functions