Port Functions; Parameters Shared Across All Port Functions - Altera Cyclone V User Manual

Hard ip for pci express
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Chapter 3: Parameter Settings

Port Functions

Table 3–1. System Settings for PCI Express (Part 3 of 3)
Parameter
Reference clock
frequency
Use 62.5 MHz
Application Layer
clock
Use deprecated RX
Avalon-ST data byte
enable port (rx_st_be)
Number of functions
Port Functions
This section describes the parameter settings for port functions. It includes the
following sections:

Parameters Shared Across All Port Functions

Parameters Defined Separately for All Port Functions
Parameters Shared Across All Port Functions
This section defines the PCI Express and PCI capabilities parameters that are shared
for all port functions. It includes the following capabilities:
Device
Error Reporting
Link
Slot
Power Management
1
Some of these parameters are stored in the
Text in
Header.
November 2011 Altera Corporation
Value
PCI Express Base Specification 2.1
The
100 MHz
100 MHz
125 MHz
provided as a convenience for systems that include a 125 MHz clock
source.
On/Off
This is a special power saving mode available only for Gen1 ×1 variants.
On/Off
When enabled the variant includes the deprecated rx_st_be signals.
1–8
Specifies the number of functions that share the same link.
green
are links to these parameters stored in the
Description
±
300 ppm reference clock. The 125 MHz reference clock is
Common Configuration Space
Common Configuration Space
3–3
requires a
Header.
Cyclone V Hard IP for PCI Express
User Guide

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