Altera Cyclone V User Manual page 90

6–2
Table 6–2
1
In the following tables, the names of fields that are defined by parameters in the
parameter editor are links to the description of that parameter. These links appear as
green
Table 6–2. PCI Type 0 Configuration Space Header (Endpoints), Rev2.1 Spec: Type 0 Configuration Space Header
Byte Offset
0x000
0x004
0x008
0x00C
0x010 Func0–Func7 BARs and Expansion ROM
0x014 Func0–Func7 BARs and Expansion ROM
0x018 Func0–Func7 BARs and Expansion ROM
0x01C Func0–Func7 BARs and Expansion ROM
0x020 Func0–Func7 BARs and Expansion ROM
0x024 Func0–Func7 BARs and Expansion ROM
0x028
0x02C
0x030 Expansion ROM base address
0x034 Reserved
0x038 Reserved
0x03C
Note to Table 6–2:
(1) Refer to Table 6–9 on page 6–5
Base Specification 2.1.
Table 6–3
Table 6–3. PCI Type 1 Configuration Space Header (Root Ports) (Part 1 of 2), Rev2.1 Spec: Type 1 Configuration Space
Header
Byte Offset
0x0000
0x004
0x008
0x00C
0x010
0x014
Secondary Latency
0x018
0x01C
Cyclone V Hard IP for PCI Express
describes the Type 0 Configuration settings.
text.
31:24 23:16
Device ID
Status
Class code
Header Type
0x00
(Port
Subsystem Device ID
0x00 0x00
for a comprehensive list of correspondences between the Configuration Space registers and the
describes the Type 1 Configuration settings.
31:24 23:16
Device ID
Status
Class code
BIST Header Type
Func0–Func7 BARs and Expansion ROM
Func0–Func7 BARs and Expansion ROM
Subordinate Bus
Timer Number
Secondary Status
15:8
0x00
type)
Reserved
Subsystem Vendor ID
Interrupt Pin
15:8
Primary Latency
Timer
Secondary Bus
Number
I/O Limit
Chapter 6: Register Descriptions
Configuration Space Register Content
7:0
Vendor ID
Command
Revision ID
Cache Line Size
Capabilities Pointer
Interrupt Line
PCI Express
7:0
Vendor ID
Command
Revision ID
Cache Line Size
Primary Bus Number
I/O Base
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