Specifying The Parameters For The Example Design - Altera Cyclone V User Manual

2–12
Table 2–15. Device Identification Registers for Func0 (Part 2 of 2)
Class Code
Subsystem Vendor ID
Subsystem Device ID
11. On the Func 0 Device tab, under PCI Express/PCI Capabilities for Func 0 turn
Function Level Reset (FLR) On.
12. Specify the Link settings listed in
Table 2–16. Link Capabilities
Data link layer active reporting
Surprise down reporting
13. On the Func0 MSI tab, for Number of MSI messages requested, select 4.
14. On the Func0 MSI-X tab, turn Implement MSI-X turned off.
15. Click the Finish button.
16. To rename the Cyclone V hard IP for PCI Express, in the Name column of the
System Contents tab, right-click on the component name, select Rename, and
type DUT r

Specifying the Parameters for the Example Design

Follow these steps to add the Example design for Avalon-Streaming Hard IP for PCI
Express component to your Qsys system.
1. On the Component Library tab, click Example design for Avalon-Streaming
Hard IP for PCI Express and then click Add. The parameter editor appears.
2. Change the parameters to match those of the Gen1 ×4 Endpoint variant by
selecting the parameter values shown in
Table 2–17. Parameters for the Example Design
Targeted device family
Lanes
Lane rate
Application Clock Rate
Port type
Application interface
Tags supported
Maximum payload size
Number of functions
3. Click Finish.
Cyclone V Hard IP for PCI Express
Table
Parameter
Parameter
Chapter 2: Getting Started
0x00000000
0x00000000
0x00000000
2–16.
Value
Off
Off
Table 2–17.
Value
Cyclone V
×4
Gen1 (2.5 Gbps)
125 MHz
Native Endpoint
Avalon-ST 64-bit
32
256
1
November 2011 Altera Corporation
Qsys Design Flow