Altera Cyclone V User Manual page 95

Chapter 6: Register Descriptions
Correspondence between Configuration Space Registers and the PCIe Spec 2.1
Table 6–9. Correspondence Configuration Space Registers and PCIe Base Specification Rev. 2.0 (Part 3 of 3)
Byte Address Hard IP Configuration Space Register
0x038 Expansion ROM Base Address
0x03C Bridge Control Interrupt Pin Interrupt Line
Table
0x050 Message Control Next Cap Ptr Capability ID
0x054 Message Address
0x058 Message Upper Address
0x05C Reserved Message Data
Table 6-5.
0x68 Message Control Next Cap Ptr Capability ID
0x6C MSI-X Table Offset BIR
0x70 Pending Bit Array (PBA) Offset BIR
0x078 Capabilities Register Next Cap PTR Cap ID
Data PM Control/Status Bridge Extensions Power
0x07C
Management Status & Control
Table 6-7 PCI Express Advanced Error Reporting Extended Capability Structure, Rev2.1 Spec: Advanced Error Reporting
0x800 PCI Express Enhanced Capability Header
0x804 Uncorrectable Error Status Register
0x808 Uncorrectable Error Mask Register
0x80C Uncorrectable Error Severity Register
0x810 Correctable Error Status Register
0x814 Correctable Error Mask Register
0x818 Advanced Error Capabilities and Control Register
0x81C Header Log Register
0x82C Root Error Command
0x830 Root Error Status
Error Source Identification Register Correctable
0x834
Error Source ID Register
November 2011 Altera Corporation
6-4.MSI Capability Structure, Rev2.1 Spec: MSI Capability Structures
MSI-X Capability Structure, Rev2.1 Spec: MSI-X Capability Structures
Table 6-6. Power Management Capability Structure, Rev2.1 Spec
Capability
Corresponding Section in PCIe Specification
Type 1 Configuration Space Header
Bridge Control Register (Offset 3Eh)
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
MSI and MSI-X Capability Structures
PCI Power Management Capability Structure
PCI Power Management Capability Structure
Advanced Error Reporting Enhanced Capability
Header
Uncorrectable Error Status Register
Uncorrectable Error Mask Register
Uncorrectable Error Severity Register
Correctable Error Status Register
Correctable Error Mask Register
Advanced Error Capabilities and Control Register
Header Log Register
Root Error Command Register
Root Error Status Register
Error Source Identification Register
Cyclone V Hard IP for PCI Express
6–7
User Guide