Release Information; Device Family Support; Configurations - Altera Cyclone V User Manual

Chapter 1: Datasheet

Release Information

Release Information
Table 1–2
Table 1–2. PCI Express Compiler Release Information
Version
Release Date
Ordering Codes
Product IDs
Vendor ID
Altera verifies that the current version of the Quartus
previous version of each IP core. Any exceptions to this verification are reported in the
MegaCore IP Library Release Notes and
IP core versions older than one release.

Device Family Support

Table 1–3
Express.
Table 1–3. Device Family Support
Cyclone V
Other device families

Configurations

The Cyclone V Hard IP for PCI Express includes a full hard IP implementation of the
PCI Express stack including the following layers:
■ Physical (PHY)
■ Physical Media Attachment (PMA)
Physical Coding Sublayer (PCS)
■
Media Access Control (MAC)
■
■ Data Link Layer (DLL)
■ Transaction Layer (TL)
November 2011 Altera Corporation
provides information about this release of the PCI Express Compiler.
Item
There are no encrypted files for the Cyclone V Hard IP for PCI
Express. The Product ID and Vendor ID are not required
because this IP core does not require a license.
shows the level of support offered by the Cyclone V Hard IP for PCI
Device Family
Description
11.1
November 2011
No ordering code is required
®
II software compiles the
Errata. Altera does not verify compilation with
Support
Preliminary. The IP core is verified with preliminary timing
models. The IP core meets all functional requirements, but
is still undergoing characterization. It can be used in
production designs with caution.
Refer to the following user guides for other device families:
IP Compiler for PCI Express User Guide
■
Stratix V Hard IP for PCI Express User Guide
■
Cyclone V Hard IP for PCI Express User Guide
■
1–3
Cyclone V Hard IP for PCI Express
User Guide