Altera Cyclone V User Manual page 34

Hard ip for pci express
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3–2
Table 3–1. System Settings for PCI Express (Part 2 of 3)
Parameter
RX Buffer credit
allocation -
performance for
received requests
Cyclone V Hard IP for PCI Express
Value
This setting determines the allocation of posted header credits, posted
data credits, non-posted header credits, completion header credits, and
completion data credits in the 6 KByte RX buffer. The 5 settings allow
you to adjust the credit allocation to optimize your system. The credit
allocation for the selected setting displays in the message pane.
Refer to
Chapter 11, Flow
optimizing performance. The Flow Control chapter explains how the RX
credit allocation and the Maximum payload size that you choose affect
the allocation of flow control credits. You can set the Maximum payload
size parameter in
Minimum–This setting configures the minimum PCIe specification
allowed non-posted and posted request credits, leaving most of the
RX Buffer space for received completion header and data. Select this
option for variations where application logic generates many read
requests and only infrequently receives single requests from the PCIe
link.
Low– This setting configures a slightly larger amount of RX Buffer
space for non-posted and posted request credits, but still dedicates
most of the space for received completion header and data. Select
this option for variations where application logic generates many read
requests and infrequently receives small bursts of requests from the
PCIe link. This option is recommended for typical endpoint
Minimum
applications where most of the PCIe traffic is generated by a DMA
Low
engine that is located in the endpoint application layer logic.
Medium
Medium–This setting allocates approximately half the RX Buffer
High
space to received requests and the other half of the RX Buffer space
Maximum
to received completions. Select this option for variations where the
received requests and received completions are roughly equal.
High–This setting configures most of the RX Buffer space for
received requests and allocates a slightly larger than minimum
amount of space for received completions. Select this option where
most of the PCIe requests are generated by the other end of the PCIe
link and the local application layer logic only infrequently generates a
small burst of read requests. This option is recommended for typical
root port applications where most of the PCIe traffic is generated by
DMA engines located in the endpoints.
Maximum–This setting configures the minimum PCIe specification
allowed amount of completion space, leaving most of the RX Buffer
space for received requests. Select this option when most of the PCIe
requests are generated by the other end of the PCIe link and the local
application layer logic never or only infrequently generates single
read requests. This option is recommended for control and status
endpoint applications that don't generate any PCIe requests of their
own and only are the target of write and read requests from the root
complex.
Chapter 3: Parameter Settings
Description
Control, for more information about
Table 3–2 on page
3–4.
November 2011 Altera Corporation
System Settings

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