Introduction To Nios Ii Floating Point Custom Instructions - Intel NIOS II Owner Reference Manual

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•

Instantiating the Nios II Processor

•

Nios II Custom Instruction User Guide

2.3.3. Introduction to Nios II Floating Point Custom Instructions

The Nios II architecture supports single precision floating point instructions with either

of two optional components:

•

Floating point hardware 2

instructions as specified by the IEEE Std 754-2008 but with simplified, non-

standard rounding modes. The basic set of floating point custom instructions

includes single precision floating point addition, subtraction, multiplication,

division, square root, integer to float conversion, float to integer conversion,

minimum, maximum, negate, absolute, and comparisons.

•

Floating point hardware (FPH1)—This component supports floating point

instructions as specified by the IEEE Std 754-1985. The basic set of floating point

custom instructions includes single-precision floating point addition, subtraction,

and multiplication. Floating point division is available as an extension to the basic

instruction set.

Note: For optimum performance and device footprint, Intel recommends using

These floating point instructions are implemented as custom instructions. The table

below lists a detailed description of the conformance to the IEEE standards.

Table 2.

Hardware Conformance with IEEE 754-1985 and IEEE 754-2008 Floating

Point Standard

Feature

Operations

Addition/

subtraction

Multiplication

Division

Square root

Integer to float/

float to integer

Minimum/

maximum

Negate/absolute

Comparisons

Precision

Single

(1)

Second generation

Nios II Processor Reference Guide

(1)

(FPH2)—This component supports floating point

FPH2 rather than FPH1.

Floating Point Hardware

Implementation with IEEE

Implemented

Optional