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31
30
29
A
15
14
13
Related Information
•
Cache and Tightly-Coupled Memory
•
flushda
•
initd
•
flushd
8.5.51. initi
Instruction
Operation
Assembler Syntax
Example
Description
Usage
Exceptions
Instruction Type
Instruction Fields
31
30
29
A
15
14
13
0x29
Related Information
Cache and Tightly-Coupled Memory
Nios II Processor Reference Guide
204
28
27
26
25
12
11
10
9
IMM16
on page 199
on page 201
on page 198
28
27
26
25
12
11
10
9
Bit Fields
24
23
22
21
0
8
7
6
5
initialize instruction cache line
Initializes the instruction cache line associated with address
rA.
initi rA
initi r6
Ignoring the tag,
initi
associated with the byte address in
invalidates that line.
If the Nios II processor core does not have an instruction
cache, the
instruction performs no operation.
initi
This instruction is used to initialize the processor's
instruction cache. Immediately after processor reset, use
to invalidate each line of the instruction cache.
initi
For more information on instruction cache, refer to the
Cache and Tightly Coupled Memory chapter of the Nios II
Software Developer's Handbook.
Supervisor-only instruction
R
= Register index of operand rA
A
Bit Fields
24
23
22
21
0
8
7
6
5
0
8. Instruction Set Reference
NII-PRG | 2018.04.18
20
19
18
17
IMM16
4
3
2
1
0x13
identifies the instruction cache line
, and
ra
initi
20
19
18
17
0
4
3
2
1
0x3a
16
0
16
0x29
0
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