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31
30
29
A
15
14
13
readr
readr
b
c
8.5.42. div
Instruction
Operation
Assembler Syntax
Example
Description
Usage
Exceptions
Instruction Type
Instruction Fields
31
30
29
A
15
14
13
0x25
Nios II Processor Reference Guide
196
28
27
26
25
12
11
10
9
N
28
27
26
25
12
11
10
9
Bit Fields
24
23
22
21
B
8
7
6
5
divide
rC
rA ÷ rB
div rC, rA, rB
div r6, r7, r8
Treating rA and rB as signed integers, this instruction
divides rA by rB and then stores the integer portion of the
resulting quotient to rC. After attempted division by zero,
the value of rC is undefined. There is no divide-by-zero
exception. After dividing –2147483648 by –1, the value of
rC is undefined (the number +2147483648 is not
representable in 32 bits). There is no overflow exception.
Nios II processors that do not implement the
instruction cause an unimplemented instruction exception.
Remainder of Division:
If the result of the division is defined, then the remainder
can be computed in rD using the following instruction
sequence:
div rC, rA, rB
mul rD, rC, rB
sub rD, rA, rD
# The original div operation
# rD = remainder
Division error
Unimplemented instruction
R
= Register index of operand rA
A
= Register index of operand rB
B
= Register index of operand rC
C
Bit Fields
24
23
22
21
B
8
7
6
5
0
8. Instruction Set Reference
NII-PRG | 2018.04.18
20
19
18
17
C
4
3
2
1
0x32
div
20
19
18
17
C
4
3
2
1
0x3a
16
readr
a
0
16
0x18
0
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