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3.4.2.14.6. The WR Flag
Setting the
when a
wrctl
Read and Write Operations section for more information. The
when read by a
Note:
Setting both the
Related Information
MPU Region Read and Write Operations
3.4.2.14.7. The eccinj Register
The
eccinj
blocks that support ECC. Injecting errors allows the software to test the ECC error
exception handling code. The error(s) are injected in the data bits, not the parity bits.
The
eccinj
Table 38.
eccinj Control Register Fields
31
30
29
15
14
13
DTCM 1
DTCM 0
Software writes 0x1 to inject a 1 bit ECC error or 0x2 to inject a 2-bit ECC error to the
RAM field. Hardware sets the value of the inject field to 0x0 after the error injection
has occurred.
Table 39.
eccinj Control Register Field Descriptions
Field
Inject an ECC error in the register file's RAM.
RF
Inject an ECC error in the instruction cache Tag RAM.
ICTAG
Inject an ECC error in the instruction cache data RAM.
ICDAT
Inject ECC error in data cache tag RAM.
DCTAG
Inject an ECC error in the data cache data RAM. Injection occurs on
DCDAT
next store instruction that writes the data cache or the next line fill.
Inject an ECC error in the MMU TLB RAM. Errors are injected in the tag
TLB
portion of the VPN field.
Inject ECC error in DTCM0. Injection occurs on next store instruction
DTCM0
that writes this DTCM.
Nios II Processor Reference Guide
64
flag signifies that an MPU region write operation should be performed
WR
instruction is issued to the
instruction.
rdctl
and
flags to one results in undefined behavior.
RD
WR
register injects 1 and 2 bit errors to the Nios II processor's internal RAM
register is only available when ECC is present.
28
27
26
25
Reserved
12
11
10
9
TLB
DC DAT
Description
register. Refer to the MPU Region
mpuacc
on page 68
Bit Fields
24
23
22
21
DC WB
8
7
6
5
DC TAG
ICDAT
3. Programming Model
NII-PRG | 2018.04.18
flag always returns 0
WR
20
19
18
17
DTCM 3
DTCM 2
4
3
2
1
ICTAG
RF
Access
Reset
Availabl
Read/Write
0
Only
with
ECC
Read/Write
0
Only
with
ECC
Read/Write
0
Only
with
ECC
Read/Write
0
Read/Write
0
Read/Write
0
Only
with
ECC
Read/Write
0
continued...
16
0
e
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