Instruction-Related Exceptions - Intel NIOS II Owner Reference Manual

3. Programming Model
NII-PRG | 2018.04.18
Figure 5. Relationship Between ienable, ipending, PIE and Hardware Interrupts
Related Information
Exception Processing Flow

3.7.7. Instruction-Related Exceptions

Instruction-related exceptions occur during execution of Nios II instructions. When
they occur, the processor perform the steps outlined in the "Exception Processing
Flow" section of this chapter.
The Nios II processor generates the following instruction-related exceptions:
• Trap instruction
• Break instruction
• Unimplemented instruction
• Illegal instruction
• Supervisor-only instruction
• Supervisor-only instruction address
1 3
External hardware
interrupt request
inputs irq[31..0]
1 3
PIE bit
on page 88
ienable Register
. . .
ipending Register
. . .
. . .
Generate
Hardware
Interrupt
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