Assembler Pseudo-Instructions; Assembler Macros - Intel NIOS II Owner Reference Manual

8.3. Assembler Pseudo-Instructions

Pseudo-instructions are used in assembly source code like regular assembly
instructions. Each pseudo-instruction is implemented at the machine level using an
equivalent instruction. The
implemented with two instructions. Most pseudo-instructions do not appear in
disassembly views of machine code.
Table 95. Assembler Pseudo-Instructions
bgt rA, rB, label
bgtu rA, rB, label
ble rA, rB, label
bleu rA, rB, label
cmpgt rC, rA, rB
cmpgti rB, rA, IMMED
cmpgtu rC, rA, rB
cmpgtui rB, rA, IMMED
cmple rC, rA, rB
cmplei rB, rA, IMMED
cmpleu rC, rA, rB
cmpleui rB, rA, IMMED
mov rC, rA
movhi rB, IMMED
movi rB, IMMED
movia rB, label
movui rB, IMMED
nop
subi rB, rA, IMMED
Refer to the Application Binary Interface chapter of the Nios II Processor Reference
Handbook for more information about global pointers.
Related Information
Application Binary Interface

8.4. Assembler Macros

The Nios II assembler provides macros to extract halfwords from labels and from 32-
bit immediate values. These macros return 16-bit signed values or 16-bit unsigned
values depending on where they are used. When used with an instruction that requires
Nios II Processor Reference Guide
172
movia
Pseudo-Instruction
on page 146
pseudo-instruction is the only exception, being
blt rB, rA, label
bltu rB, rA, label
bge rB, rA, label
bgeu rB, rA, label
cmplt rC, rB, rA
cmpgei rB, rA, (IMMED+1)
cmpltu rC, rB, rA
cmpgeui rB, rA, (IMMED+1)
cmpge rC, rB, rA
cmplti rB, rA, (IMMED+1)
cmpgeu rC, rB, rA
cmpltui rB, rA, (IMMED+1)
add rC, rA, r0
orhi rB, r0, IMMED
addi, rB, r0, IMMED
orhi rB, r0, %hiadj(label)
addi, rB, r0, %lo(label)
ori rB, r0, IMMED
add r0, r0, r0
addi rB, rA, (-IMMED)
8. Instruction Set Reference
NII-PRG | 2018.04.18
Equivalent Instruction