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31
30
29
0
15
14
13
0x36
8.5.93. trap
Instruction
Operation
Assembler Syntax
Example
Description
Usage
Exceptions
Instruction Type
Instruction Fields
31
30
29
0
15
14
13
0x2d
8.5.94. wrctl
Instruction
Operation
Assembler Syntax
Example
Nios II Processor Reference Guide
230
28
27
26
25
12
11
10
9
28
27
26
25
12
11
10
9
Bit Fields
24
23
22
21
0
8
7
6
5
0
trap
estatus
status
PIE
0
U
0
PC + 4
ea
PC
exception handler address
trap
trap imm5
trap
Saves the address of the next instruction in register
saves the contents of the
disables interrupts, and transfers execution to the exception
handler. The address of the exception handler is specified
with the Nios_II Processor parameter editor in Platform
Designer.
The 5-bit immediate field
but it can be used by the debugger.
with no argument is the same as
trap
To return from the exception handler, execute an
instruction.
Trap
R
= Type of breakpoint
IMM5
Bit Fields
24
23
22
21
0
8
7
6
5
IMM5
write to control register
ctlN
rA
wrctl ctlN, rA
wrctl ctl6, r3
8. Instruction Set Reference
NII-PRG | 2018.04.18
20
19
18
17
0
4
3
2
1
0x3a
ea
register in
,
status
estatus
is ignored by the processor,
imm5
.
trap 0
eret
20
19
18
17
0x1d
4
3
2
1
0x3a
continued...
16
0x36
0
,
16
0x2d
0
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