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Assembler Syntax
Example
Description
Usage
Exceptions
Instruction Type
Instruction Fields
31
30
29
A
15
14
13
0x07
8.5.69. nextpc
Instruction
Operation
Assembler Syntax
Example
Description
Usage
Exceptions
Instruction Type
Instruction Fields
Nios II Processor Reference Guide
216
28
27
26
25
12
11
10
9
mulxuu rC, rA, rB
mulxuu r6, r7, r8
Treating rA and rB as unsigned integers,
rA times rB and stores the 32 high-order bits of the product
to rC.
Nios II processors that do not implement the
instruction cause an unimplemented instruction exception.
Use
and
to compute the 64-bit product of two
mulxuu
mul
32-bit unsigned integers. Furthermore,
as part of the calculation of a 128-bit product of two 64-bit
signed integers. Given two 64-bit signed integers, each
contained in a pair of 32-bit registers, (S1 : U1) and (S2 :
U2), their 128-bit product is (U1 x U2) + ((S1 x U2) << 32)
+ ((U1 x S2) << 32) + ((S1 x S2) << 64). The
instructions are used to calculate the 64-bit product
mul
U1 x U2.
also can be used as part of the calculation of a 128-
mulxuu
bit product of two 64-bit unsigned integers. Given two 64-
bit unsigned integers, each contained in a pair of 32-bit
registers, (T1 : U1) and (T2 : U2), their 128-bit product is
(U1 x U2) + ((U1 x T2) << 32) + ((T1 x U2) << 32) + ((T1
x T2) << 64). The
mulxuu
calculate the four 64-bit products U1 x U2, U1 x T2, T1 x
U2, and T1 x T2.
Unimplemented instruction
R
= Register index of operand rA
A
= Register index of operand rB
B
= Register index of operand rC
C
Bit Fields
24
23
22
21
B
8
7
6
5
0
get address of following instruction
rC
PC + 4
nextpc rC
nextpc r6
Stores the address of the next instruction to register rC.
A relocatable code fragment can use
the address of its data segment.
access the PC directly.
None
R
= Register index of operand rC
C
8. Instruction Set Reference
NII-PRG | 2018.04.18
multiplies
mulxuu
mulxuu
can be used
mulxuu
mulxuu
and
instructions are used to
mul
20
19
18
17
C
4
3
2
1
0x3a
to calculate
nextpc
is the only way to
nextpc
and
16
0x07
0
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