S1D13504 Configuration - Epson S1D13504 Technical Manual

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5.5 S1D13504 Configuration

S1D13504
Pin Name
MD0
MD1
MD2
MD3
MD4
MD5
MD3
0
0
0
0
1
S1D13504
X19A-G-005-09
The S1D13504 latches MD15 through MD0 to allow selection of the bus mode and other
configuration data on the rising edge of RESET#. For details on configuration, refer to the
S1D13504 Hardware Specification, document number X19A-A-002-xx.
The partial table below only shows those configuration settings relevant to the IT8368E
implementation.
Table 5-3: S1D13504 Configuration using the IT8368E
value on this pin at rising edge of RESET# is used to configure:(1/0)
1
8-bit host bus interface
See "Host Bus Selection" table below
Little Endian
WAIT# signal is active high
= required configuration for connection using ITE IT8368E
Table 5-4: S1D13504 Host Bus Selection using the IT8368E
MD2 MD1
0 0 SH-3 bus interface
0 1 MC68K bus 1 interface (e.g. MC68000)
1 0 MC68K bus 2 interface (e.g. MC68030)
1 1 Generic bus interface (e.g. MCF5307, ISA bus interface)
x x Reserved
= required configuration for connection using ITE IT8368E
Epson Research and Development
0
16-bit host bus interface
See "Host Bus Selection" table below
Big Endian
WAIT# signal is active low
Host Bus Interface
Interfacing to the Philips MIPS PR31500/PR31700 Processor
Vancouver Design Center
Issue Date: 01/10/26