Summary Of Configuration Options; Table 5-8: Summary Of Power On / Reset Options - Epson S1D13504 Technical Manual

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5.5 Summary of Configuration Options

Pin Name
MD0 8-bit host bus interface
Select host bus interface:
000 = SH-3 bus interface
001 = MC68K bus 1 (e.g. MC68000)
MD[3:1]
010 = MC68K bus 2 (e.g. MC68030)
011 = Generic bus interface (e.g. Philips MIPS PR31500/PR31700; NEC MIPS V
1XX = reserved
MD4 Little Endian
MD5 WAIT# is active high (1 = insert wait state)
Memory Address/GPIO configuration:
00 = symmetrical 256K×16 DRAM.
MD[7:6] 01 = symmetrical 1M×16 DRAM.
10 = asymmetrical 256K×16 DRAM. MA[9:0]
11 = asymmetrical 1M×16 DRAM.
Configure DACRD#, BLANK#, DACP0, DACWR#,
MD8 DACRS0, DACRS1, HRTC, VRTC as General
Purpose IO (GPIO[11:4]).
MD9 SUSPEND# pin configured as GPO output.
MD10 Active low LCDPWR or GPO polarities.
MD[15:11] Not used.
S1D13504
X19A-A-002-19

Table 5-8: Summary of Power On / Reset Options

value on this pin at rising edge of RESET# is used to configure:
1
MA[8:0]
MA[9:0]
MA[11:0] = DRAM address.
Epson Research and Development
16-bit host bus interface
Big Endian
WAIT# is active low (0 = insert wait state)
= DRAM address. MA[11:9]
= DRAM address. MA[11:10]
= DRAM address. MA[11:10]
Configure DACRD#, BLANK#, DACP0, DACWR#,
DACRS0, DACRS1, HRTC, VRTC as DAC and CRT
outputs.
SUSPEND# pin configured as SUSPEND# input.
Active high LCDPWR or GPO polarities.
Vancouver Design Center
(1/0)
0
4102)
R
= GPIO[2:1] and GPIO3.
= GPIO[2:1].
= GPIO[2:1].
Hardware Functional Specification
Issue Date: 01/11/06