Fpm-Dram Self-Refresh Timing; Table 7-16: Fpm-Dram Cbr Self-Refresh Timing; Figure 7-16: Fpm-Dram Cbr Self-Refresh Timing - Epson S1D13504 Technical Manual

Epson Research and Development
Vancouver Design Center

7.3.10 FPM-DRAM Self-Refresh Timing

Memory
Clock
RAS#
CAS#
Symbol
t1
Memory clock
RAS# to CAS# precharge time (REG[22h] bits [3:2] = 00)
t2
RAS# to CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
CAS# precharge time (REG[22h] bits [3:2] = 00)
t3
CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
t4
CAS# setup time (CAS# before RAS# refresh)
RAS# precharge time (REG[22h] bits [3:2] = 00)
t5
RAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
Hardware Functional Specification
Issue Date: 01/11/06
Stopped for
suspend mode
t1
t5
t2
t4
t3

Figure 7-16: FPM-DRAM CBR Self-Refresh Timing

Table 7-16: FPM-DRAM CBR Self-Refresh Timing

Parameter
Restarted for
active mode
Min Typ
40
2 t1
1 t1
2 t1
1 t1
0.45 t1 - 2
2.45 t1 - 1
1.45 t1 - 1
Page 61
Max Units
ns
ns
ns
ns
ns
ns
ns
ns
S1D13504
X19A-A-002-19