Functional Block Descriptions; Host Interface; Memory Controller; Display Fifo - Epson S1D13504 Technical Manual

Color graphics lcd/crt controller
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4.2 Functional Block Descriptions

4.2.1 Host Interface

4.2.2 Memory Controller

4.2.3 Display FIFO

4.2.4 Look-Up Table

4.2.5 LCD Interface

4.2.6 Power Save

Hardware Functional Specification
Issue Date: 01/11/06
The Host Interface block provides the means for the CPU/MPU to communicate with the display
buffer and internal registers, via one of the supported bus interfaces.
The Memory Controller block arbitrates between CPU accesses and display refresh accesses as well
as generates the necessary signals to interface to one of the supported 16-bit memory devices (FPM-
DRAM or EDO-DRAM).
The Display FIFO block fetches display data from the Memory Controller for display refresh.
The Look-Up Table block contains three 16x4 Look-Up Tables, one for each primary color. In
monochrome mode only one of these Look-Up Tables is selected and used.
The LCD Interface block performs frame rate modulation for passive LCD panels. It also generates
the correct data format and timing control signals for various LCD and TFT panels.
The Power Save block contains the power save mode circuitry.
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S1D13504
X19A-A-002-19

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