Fpm-Dram Cas# Before Ras# Refresh Timing; Table 7-15: Fpm-Dram Cas# Before Ras# Refresh Timing; Figure 7-15: Fpm-Dram Cas# Before Ras# Refresh Timing - Epson S1D13504 Technical Manual

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7.3.9 FPM-DRAM CAS# Before RAS# Refresh Timing

Memory
Clock
RAS#
CAS#
Symbol
t1
Memory clock
RAS# to CAS# precharge time (REG[22h] bits [3:2] = 00)
t2
RAS# to CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
Random read or write cycle time (REG[22h] bits [6:5] = 00)
t3 Random read or write cycle time (REG[22h] bits [6:5] = 01)
Random read or write cycle time (REG[22h] bits [6:5] = 10)
CAS# precharge time (REG[22h] bits [3:2] = 00)
t4
CAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
t5
CAS# setup time (CAS# before RAS# refresh)
RAS# precharge time (REG[22h] bits [3:2] = 00)
t6
RAS# precharge time (REG[22h] bits [3:2] = 01 or 10)
S1D13504
X19A-A-002-19
t1
t2
t4 t5
t6

Figure 7-15: FPM-DRAM CAS# Before RAS# Refresh Timing

Table 7-15: FPM-DRAM CAS# Before RAS# Refresh Timing

Parameter
t3
Min
1 t1
5 t1
4 t1
3 t1
1 t1
0.45 t1 - 2
2.45 t1 - 1
1.45 t1 - 1
Epson Research and Development
Vancouver Design Center
Typ Max
40
2 t1
2 t1
Hardware Functional Specification
Issue Date: 01/11/06
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns