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7.1.2 MC68K Bus 1 Interface Timing (e.g. MC68000)
t1
CLK
A[20:1]
M/R#
CS#
AS#
UDS#
LDS#
R/W#
DTACK#
D[15:0](write)
D[15:0](read)
S1D13504
X19A-A-002-19
t2
t3
t4
t7
t9
t11
t13
Figure 7-2: MC68K Bus 1 Interface Timing
Epson Research and Development
Vancouver Design Center
t5
t6
t16
t8
t10
t12
t15
t14
Hardware Functional Specification
Issue Date: 01/11/06