Epson S1D13504 Technical Manual page 280

Color graphics lcd/crt controller

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X19A-B-008-03

This field displays the CLKI frequency that 13A04DFG

will use for configuration calculations.

These controls are used to inform 13A04DCFG of the

clock frequency attached to BUSCLK. Setting incorrect

BUSCLK values result in errors in the rest of the

configuration process.

Use this control to set the BUSCLK frequency by

selecting a frequency from the dropdown control. If the

dropdown does not contain the exact frequency then the

frequency can be typed into the edit box.

This field displays the BUSCLK frequency that

13A04DFG will use for configuration calculations.

The PCLK controls allow adjustment of the pixel clock

(PCLK) frequency.

PCLK source is always MCLK.

Set the MCKL divide ratio to derive PCLK.

Displays the PCLK frequency used by 13A04DCFG for

configuration calculations.

The MCLK controls allow adjustment of the memory

clock (MCLK) frequency.

MCLK source is always CLKI.

Set the CLKI divide ratio to derive MCLK.

Displays the MCLK frequency used by 13A04DCFG

for configuration calculations.

13504DCFG Driver Configuration Program

Epson Research and Development

Vancouver Design Center

Issue Date: 01/10/26

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