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Epson Research and Development
Vancouver Design Center
GPIO Status / Control Register 0
REG[20h]
GPIO7 Pin
GPIO6 Pin
IO Status
IO Status
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Hardware Functional Specification
Issue Date: 01/11/06
GPIO5 Pin
GPIO4 Pin
IO Status
IO Status
GPIO7 Pin IO Status
When GPIO7 is configured as an output, a "1" in this bit drives GPIO7 to high and a "0" in this bit
drives GPIO7 to low. When GPIO7 is configured as an input, a read from this bit returns the status
of GPIO7. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO7, other-
wise the DACWR# pin is controlled automatically and this bit will have no effect on hardware.
GPIO6 Pin IO Status
When GPIO6 is configured as an output, a "1" in this bit drives GPIO6 to high and a "0" in this bit
drives GPIO6 to low. When GPIO6 is configured as an input, a read from this bit returns the status
of GPIO6. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO6, other-
wise the DACP0 pin is controlled automatically and this bit will have no effect on hardware.
GPIO5 Pin IO Status
When GPIO5 is configured as an output, a "1" in this bit drives GPIO5 to high and a "0" in this bit
drives GPIO5 to low. When GPIO5 is configured as an input, a read from this bit returns the status
of GPIO5. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO5, other-
wise the BLANK# pin is controlled automatically and this bit will have no effect on hardware.
GPIO4 Pin IO Status
When GPIO4 is configured as an output, a "1" in this bit drives GPIO4 to high and a "0" in this bit
drives GPIO4 to low. When GPIO4 is configured as an input, a read from this bit returns the status
of GPIO4. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO4, other-
wise the DACRD# pin is controlled automatically and this bit will have no effect on hardware.
GPIO3 Pin IO Status
When GPIO3 is configured as an output, a "1" in this bit drives GPIO3 to high and a "0" in this bit
drives GPIO3 to low. When GPIO3 is configured as an input, a read from this bit returns the status
of GPIO3. Note the MD[7:6] pins must be properly configured at the rising edge of RESET# to
enable GPIO3, otherwise the MA9 pin is controlled automatically and this bit will have no effect on
hardware.
GPIO2 Pin IO Status
When GPIO2 is configured as an output, a "1" in this bit drives GPIO2 to high and a "0" in this bit
drives GPIO2 to low. When GPIO2 is configured as an input, a read from this bit returns the status
of GPIO2. Note the MD[7:6] pins must be properly configured at the rising edge of RESET# to
enable GPIO2, otherwise the MA11 pin is controlled automatically and this bit will have no effect
on hardware.
GPIO1 Pin IO Status
When GPIO1 is configured as an output, a "1" in this bit drives GPIO1 to high and a "0" in this bit
drives GPIO1 to low. When GPIO1 is configured as an input, a read from this bit returns the status
of GPIO1. Note the MD[7:6] pins must be properly configured at the rising edge of RESET# to
enable GPIO1, otherwise the MA10 pin is controlled automatically and this bit will have no effect
on hardware.
GPIO0 Pin IO Status
When GPIO0 is configured as an output, a "1" in this bit drives GPIO0 to high and a "0" in this bit
drives GPIO0 to low. When GPIO0 is configured as an input, a read from this bit returns the status
of GPIO0.
GPIO3 Pin
GPIO2 Pin
IO Status
IO Status
Page 105
RW
GPIO1 Pin
GPIO0 Pin
IO Status
IO Status
S1D13504
X19A-A-002-19
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