Epson S1D13504 Technical Manual page 441

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Table 3-1: Generic MPU Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . 10
Table 4-1: Summary of Power-On/Reset Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4-2: Host Bus Interface Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4-2: NEC/S1D13504 Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 2-1: NEC VR4102 Read/Write Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4-1: Typical Implementation of VR4102 to S1D13504 Interface . . . . . . . . . . . . . . . . 12
Interfacing to the NEC VR4102™ Microprocessor
Issue Date: 01/10/26
List of Tables
List of Figures
Page 5
S1D13504
X19A-G-007-08

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