Block Description; Functional Block Diagram; Figure 4-1: System Block Diagram Showing Datapaths - Epson S1D13504 Technical Manual

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4 Block Description

4.1 Functional Block Diagram

Register
CPU / MPU
Bus Clock
S1D13504
X19A-A-002-19
16-bit FPM/EDO
Memory
Controller
CPU
R/W
Host
I/F
Memory Clock

Figure 4-1: System Block Diagram Showing Datapaths

DRAM
Power Save
Clocks
Display
FIFO
Pixel Clock
Epson Research and Development
Vancouver Design Center
LCD
I/F
Look-Up
Table
CRTC
Hardware Functional Specification
LCD
DAC
Data
DAC
Control
Issue Date: 01/11/06