Summary Of Configuration Options; Multiple Function Pin Mapping; Table 5-6 Summary Of Power On / Reset Options; Table 5-7 Cpu Interface Pin Mapping - Epson S1D13505F00A Technical Manual

Embedded ramdac lcd/crt controller
Table of Contents

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5: PINS
5.3 Summary of Configuration Options
Pin Name
MD0
8-bit host bus interface
MD[3:1]
Select host bus interface:MD[11] = 0:
000 = SH-3/SH-4 bus interface
001 = MC68K Bus 1
010 = MC68K Bus 2
011 = Generic
100 = Reserved
101 = MIPS/ISA
110 = PowerPC
111 = PC Card (when MD11 = 1Philips PR31500/PR31700 or Toshiba TX3912 Bus)
MD4
Little Endian
MD5
WAIT# is active high (1 = insert wait state)
MD[7:6]
Memory Address/GPIO configuration:
00 = symmetrical 256K×16 DRAM. MA[8:0] = DRAM address. MA[11:9] = GPIO2,1,3 pins.
01 = symmetrical 1M×16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
10 = asymmetrical 256K×16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
11 = asymmetrical 1M×16 DRAM. MA[11:0] = DRAM address.
MD8
Not used
MD9
SUSPEND# pin configured as GPO output
MD10
Active low LCDPWR and GPO polarities
MD11
Alternate Host Bus Interface Selected
MD12
BUSCLK input divided by 2
MD[15:13]
Not used

5.4 Multiple Function Pin Mapping

S1D13505
MC68K
SH-3
SH-4
Pin Name
Bus 1
AB20
A20
A20
AB19
A19
A19
AB18
A18
A18
AB17
A17
A17
AB[16:13] A[16:13]
A[16:13]
A[16:13]
AB[12:1]
A[12:1]
A[12:1]
A[12:1]
AB0
A0
A0
LDS#
DB[15:8]
D[15:8]
D[15:8]
D[15:8]
DB[7:0]
D[7:0]
D[7:0]
D[7:0]
WE1#
WE1#
WE1#
UDS#
M/R#
CS#
BUSCLK
CKIO
CKIO
BS#
BS#
BS#
RD/WR#
RD/WR# RD/WR#
R/W#
RD#
RD#
RD#
WE0#
WE0#
WE0#
WAIT#
WAIT#
RDY
DTACK# DSACK1#
RESET#
RESET#
RESET#
RESET#
1-20
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Table 5-6 Summary of Power On / Reset Options

Value on this pin at rising edge of RESET# is used to configure: (1/0)
1
16-bit host bus interface
Big Endian
WAIT# is active low (0 = insert wait state)
SUSPEND# pin configured as SUSPEND# input
Active high LCDPWR and GPO polarities
Primary Host Bus Interface Selected
BUSCLK input not divided

Table 5-7 CPU Interface Pin Mapping

Philips
MC68K
Generic MIPS/ISA
PR31500
Bus 2
/PR31700
A20
A20
A20
LatchA20
ALE
A19
A19
A19
SA19
/CAR-
DREG
A18
A18
A18
SA18
/CAR-
DIORD
A17
A17
A17
SA17
/CAR-
DIOWR
A[16:13]
A[16:13] SA[16:13]
V
A[12:1]
A[12:1]
SA[12:1]
A[12:1]
A0
A0
SA0
A0
D[31:24]
D[15:8]
SD[15:8]
D[31:24]
D[23:16]
D[7:0]
SD[7:0]
D[23:16]
DS#
WE1#
SBHE#
/CARD
xCSH
External Decode
External Decode
CLK
CLK
BCLK
CLK
DCLK-
OUT
AS#
AS#
V
V
V
DD
DD
R/W#
RD1#
V
/CARD
DD
xCSL
V
SIZ1
RD0#
MEMR#
/RD
DD
V
SIZ0
WE0#
MEMW#
/WE
DD
WAIT#
IOCHRD
/CARD x
Y
WAIT
RESET#
RESET#
inverted
RESET#
RESET
EPSON
S1D13505F00A HARDWARE FUNCTIONAL
0
Toshiba
PC Card
PowerPC
(PCMCIA)
TX3912
ALE
A11
A20
CAR-
A12
A19
DREG*
CAR-
A13
A18
DIORD*
CAR-
A14
A17
DIOWR*
V
A[15:18]
A[16:13]
DD
DD
A[12:1]
A[19:30]
A[12:1]
A0
A31
A0
D[31:24]
D[0:7]
D[15:8]
D[23:16]
D[8:15]
D[7:0]
CARD
BI#
-CE2
xCSH*
V
External Decode
DD
V
External Decode
DD
DCLK-
CLKOUT
CLKI
OUT
V
TS#
V
DD
DD
DD
CARD
RD/WR#
-CE1
xCSL*
RD*
TSIZ0
-OE
WE*
TSIZ1
-WE
CARD x
TA#
-WAIT
WAIT*
PON*
RESET#
inverted
RESET
SPECIFICATION (X23A-A-001-12)

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