Epson S1D13504 Technical Manual page 283

Epson Research and Development
Vancouver Design Center
13504DCFG Driver Configuration Program
Issue Date: 01/10/26
Non-display period
Frame Rate
Pixel Clock
TFT/FPLINE (pixels)
Start pos
Pulse width
TFT/FPFRAME (lines)
Start pos
Manually entered panel widths must be a multiple of 16
pixels for passive (STN) panels and 8 pixels for TFT
panels. If a manually entered panel width does not meet
the above restrictions a notification box appears and
13504DCFG rounds up the value to the next allowable
width.
It is recommended that these automatically generated
non-display values be used without adjustment.
However, manual adjustment may be required to fine
tune the non-display width and the non-display height.
As a general rule passive LCD panels and some CRTs
are tolerant of a wide range of non-display times. Active
panels and some CRTs are far less tolerant of changes
to the non-display period.
Displays the current Frame Rate based on clock and
panel parameters.
Displays the current PCLK Frequency as set in the
Clocks tab.
These settings allow fine tuning the TFT line pulse
parameters and are only available when the selected
panel type is TFT. Refer to S1D13504 Hardware
Functional Specification, document number X19A-B-
001-xx for a complete description of the FPLINE pulse
settings.
Specifies the delay (in pixels) from the start of the
horizontal non-display period to the leading edge of the
FPLINE pulse.
Specifies the pulse width (in pixels) of the FPLINE
output signal.
These settings allow fine tuning the TFT frame pulse
parameters and are only available when the selected
panel type is TFT. Refer to S1D13504 Hardware
Functional Specification, document number X19A-B-
001-xx, for a complete description of the FPFRAME
pulse settings.
Specify the delay (in lines) from the start of the vertical
non-display period to the leading edge of the
FPFRAME pulse.
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S1D13504
X19A-B-008-03