Table 5-11: Lcd, Crt, Ramdac Interface Pin Mapping; Vancouver Design Center - Epson S1D13504 Technical Manual

Color graphics lcd/crt controller
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Vancouver Design Center

Monochrome Passive
Panel
S1D13504
Pin Names
Single
4-bit
8-bit
FPFRAME
FPLINE
FPSHIFT
DRDY
FPDAT0
driven 0
D0
FPDAT1
driven 0
D1
FPDAT2
driven 0
D2
FPDAT3
driven 0
D3
FPDAT4
D0
D4
FPDAT5
D1
D5
FPDAT6
D2
D6
FPDAT7
D3
D7
FPDAT8
driven 0 driven 0 driven 0 driven 0
FPDAT9
driven 0 driven 0 driven 0 driven 0
FPDAT10
driven 0 driven 0 driven 0 driven 0
FPDAT11
driven 0 driven 0 driven 0 driven 0
FPDAT12
driven 0 driven 0 driven 0 driven 0
FPDAT13
driven 0 driven 0 driven 0 driven 0
FPDAT14
driven 0 driven 0 driven 0 driven 0
FPDAT15
driven 0 driven 0 driven 0 driven 0
DACRD#
BLANK#
DACP0
DACWR#
DACRS0
DACRS1
HRTC
VRTC
DACCLK
Hardware Functional Specification
Issue Date: 01/11/06

Table 5-11: LCD, CRT, RAMDAC Interface Pin Mapping

Dual
Single
Format 1
8-bit
4-bit
MOD
FPSHIFT2
LD0
driven 0
LD1
driven 0
LD2
driven 0
LD3
driven 0
UD0
D0
UD1
D1
UD2
D2
UD3
D3
driven 0
driven 0
driven 0
driven 0
driven 0
driven 0
driven 0
driven 0
Note
1. Although 18-bit TFT panels are supported only 16 data bits (64K colors) are available
- R0 and B0 are not used.
2. If no LCD is active these pins are driven low.
3. All GPIO pins default to input on reset, and unless programmed otherwise should be
connected to either V
Color Passive Panel
Single
Single
Dual
Format 2
8-bit
8-bit
8-bit
FPFRAME
FPLINE
FPSHIFT
MOD
D0
D0
LD0
D1
D1
LD1
D2
D2
LD2
D3
D3
LD3
D4
D4
UD0
D5
D5
UD1
D6
D6
UD2
D7
D7
UD3
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
3
GPIO4
3
GPIO5
3
GPIO6
3
GPIO7
3
GPIO8
3
GPIO9
3
GPIO10
3
GPIO11
driven 0
or IO V
if not used.
SS
DD
Color TFT Panel
16-bit
9-bit
12-bit
18-bit
DRDY
LD0
R2
R3
LD1
R1
R2
LD2
R0
R1
LD3
G2
G3
UD0
G1
G2
UD1
G0
G1
UD2
B2
B3
UD3
B1
B2
LD4
B0
B1
LD5
driven 0
R0
LD6
driven 0 driven 0
LD7
driven 0
G0
UD4
driven 0 driven 0
UD5
driven 0 driven 0
UD6
driven 0
B0
UD7
driven 0 driven 0
Page 33
CRT
1
2
Note
2
Note
2
Note
2
Note
2
R5
Note
2
R4
Note
2
R3
Note
2
G5
Note
2
G4
Note
2
G3
Note
2
B5
Note
2
B4
Note
2
B3
Note
R2
DACP7
R1
DACP6
G2
DACP5
G1
DACP4
G0
DACP3
B2
DACP2
B1
DACP1
DACRD#
BLANK#
DACP0
DACWR#
DACRS0
DACRS1
HRTC
VRTC
DACCLK
S1D13504
X19A-A-002-19

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