Port E Control Register (Pcre); Port E Direction Register (Prre); Port E Data Register (Pdre) - Freescale Semiconductor DSP56374 User Manual

8.5.2.1

Port E Control Register (PCRE)

The read/write 24-bit Port E Control Register (PCRE) in conjunction with the Port E Direction Register (PRRE) controls the functionality of
the ESAI_1 GPIO pins. Each of the PE(11:0) bits controls the functionality of the corresponding port pin. See
configurations. Hardware and software reset clear all PCRE bits.
8.5.2.2

Port E Direction Register (PRRE)

The read/write 24-bit Port E Direction Register (PRRE) in conjunction with the Port E Control Register (PCRE) controls the functionality of
the ESAI_1 GPIO pins. Table 8-12
11
Y:$FFFF9F PE11
23
11
Y:$FFFF9E PDE11 PDE10
23
8.5.2.3

Port E Data register (PDRE)

The read/write 24-bit Port E Data Register (see
to read or write data from/to the corresponding port pins if they are configured as GPIO. If a port pin [i] is configured as a GPIO input, the
corresponding PD[i] bit will reflect the value present on this pin. If a port pin [i] is configured as a GPIO output, the value written into the
corresponding PD[i] bit will be reflected on this pin. If a port pin [i] is configured as disconnected, the corresponding PD[i] bit is not reset
and contains undefined data.
Freescale Semiconductor
describes the port-pin configurations. Hardware and software reset clear all PRRE bits.
Table 8-13. PCRE and PRRE Bits Functionality
PDE[i] PE[i]
0 0
0 1
1 0
1 1
10 9 8 7
PE10 PE9 PE8 PE7
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 8-22. PCRE Register
10 9 8 7
PDE9 PDE8 PDE7
22 21 20 19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 8-23. PRRE Register
Table 8-24) is used to read or write data to/from ESAI_1 GPIO pins. Bits PD(11:0) are used
DSP56374 Users Guide, Rev. 1.2
Port Pin[i] Function
Disconnected
GPIO input
GPIO output
ESAI_1
6 5 4 3
PE6 PE5 PE4 PE3
18 17 16 15
6 5 4 3
PDE6 PDE5 PDE4 PDE3
18 17 16 15
GPIO - Pins and Registers
Table 8-12 for the port-pin
2 1 0
PE2 PE1 PE0
14 13 12
2 1 0
PDE2 PDE1 PDE0
14 13 12
8-37