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11
X:$FFFF98
23
6.2.4
Timer/Event Counter Signals
The timer/event counter signals (TIO0, TIO1 and TIO2), when not used as timer signals can be configured as GPIO signals. These signals are
controlled by the appropriate timer control status register (TCSR). The register is described in
Freescale Semiconductor
10
9
8
7
22
21
20
19
Reserved bit - read as zero; should be written with zero for future compatibility.
Figure 6-6. PDRH Register
DSP56374 Users Guide, Rev. 1.2
6
5
4
3
PD4
PD3
18
17
16
15
Chapter 9, Triple Timer Module
Programming Model
2
1
0
PD2
PD1
PD0
14
13
12
6-5
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