Freescale Semiconductor DSP56374 User Manual page 73

Table 5-3. PLL Control (PCTL) Register Bit Definitions (continued)
Bit Number Bit Name
13 PEN
12 PSTP
10–8 DF[2–0]
Freescale Semiconductor
Reset
Value
a PLL Enable
Enables PLL operation. When PEN is set, the PLL is enabled and the internal
clocks are derived from the PLL VCO output. When PEN is cleared, the PLL is
disabled and the internal clocks are derived directly from the EXTAL signal. When
the PLL is disabled, the VCO stops to minimize power consumption. The PEN bit
may be set or cleared by software any time during the device operation. During
hardware reset, this bit is set or cleared based on the value of the PLL PINIT
input. Note that the core is stopped when the PLL is enabled, but unlocked.
0 PLL Stop State
Controls PLL and on-chip crystal oscillator behavior during the Stop processing
state. When PSTP is set, the PLL remains operating when the chip is in the Stop
state. When PSTP is cleared and the device enters the Stop state, the PLL is
disabled, to further reduce power consumption. This however results in longer
recovery time upon exit from the Stop state. To enable rapid recovery when
exiting the Stop state (but at the cost of higher power consumption during the
Stop state), PSTP should be set.
Operation During Stop State
PSTP PEN
PLL
0 x Disabled
1 0 Disabled
1 1 Enabled
0 Division Factor
Define the DF of the low-power divider. These bits specify the DF as a power of
two in the range from 2
cause a loss of lock condition. Whenever possible, changes of the operating
frequency of the device (for example, to enter a low-power mode) should be
made by changing the value of the DF[2–0] bits rather than changing the MF[7–0]
bits.
DF[2–0]
000
001
010
011
100
101
110
111
DSP56374 Users Guide, Rev. 1.2
Description
Recovery Time
From Stop State
Oscillator
Disabled
Enabled
Enabled
0 7
to 2 . Changing the value of the DF[2–0] bits does not
DF Value
0
2 = 1
1
2 = 2
2
2 = 4
3
2 = 8
4
2 = 16
5
2 = 32
6
2 = 64
7
2 = 128
PLL Programming Model
Power
Consumption
During Stop
State
Long Minimal
Short Lower
Short Higher
5-9