Measurement Input Period (Mode 5) - Freescale Semiconductor DSP56374 User Manual

Operating Modes
9.3.2.2

Measurement Input Period (Mode 5)

Bit Settings
TC3 TC2 TC1
0 1 0
In Mode 5, the timer counts the period between the reception of signal edges of the same polarity across the TIO signal. The value of the INV
bit determines whether the period is measured between consecutive low-to-high (0 to 1) transitions of TIO or between consecutive high-to-low
(1 to 0) transitions of TIO. If INV is set, high-to-low signal transitions are selected. If INV is cleared, low-to-high signal transitions are
selected. After the first appropriate transition occurs on the TIO input signal, the counter is loaded with the TLR value. On the next signal
transition of the same polarity that occurs on TIO, TCSR[TCF] is set, and a compare interrupt is generated if the TCSR[TCIE] bit is set. The
contents of the counter load into the TCR. The TCR then contains the value of the time that elapsed between the two signal transitions on the
TIO signal. After the second signal transition, if the TCSR[TRM] bit is set, the TCSR[TE] bit is set to clear the counter and enable the timer.
The counter is repeatedly loaded and incremented until the timer is disabled. If the TCSR[TRM] bit is cleared, the counter continues to
increment until it overflows.
Mode 5 (internal clock): TRM = 1
N = write preload
M = write compare
TE
Clock
(CLK/2 or prescale CLK)
TLR
Counter
TCR
TIO pin
TCF (Compare Interrupt if TCIE = 1)
NOTE: If INV = 1, a 1-to-0 edge on TIO loads the counter, and a 0-to-1 edge on TIO
loads TCR with count and the counter with N.
9-12
Mode Characteristics
TC0 Mode Name
1 5 Input period
first event
N
0 N
period being measured
Figure 9-13. Period Measurement Mode, TRM = 1
DSP56374 Users Guide, Rev. 1.2
Function
Measurement
N + 1 M N
M
TIO Clock
Input Internal
Counter continues
counting, does
N + 1
not stop
Interrupt Service
reads TCR; period
= M - N clock
periods
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