Jtag/Once Interface - Freescale Semiconductor DSP56374 User Manual

2.12

JTAG/OnCE Interface

Signal Signal
Name Type
TCK Input
TDI Input
TDO Output
TMS Input
Freescale Semiconductor
Table 2-12. JTAG/OnCE Interface
State during
Reset
Input Test Clock—TCK is a test clock input signal used to synchronize the JTAG
test logic.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
Input Test Data Input—TDI is a test data serial input signal used for test
instructions and data. TDI is sampled on the rising edge of TCK.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
Tri-stated Test Data Output—TDO is a test data serial output signal used for test
instructions and data. TDO is tri-statable and is actively driven in the shift-IR
and shift-DR controller states. TDO changes on the falling edge of TCK.
Input Test Mode Select—TMS is an input signal used to sequence the test
controller's state machine. TMS is sampled on the rising edge of TCK.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
DSP56374 Users Guide, Rev. 1.2
Signal Description
JTAG/OnCE Interface
2-19