Freescale Semiconductor DSP56374 User Manual page 195

M_HRS EQU 2
M_CPOL EQU 1
M_CPHA EQU 0
;------------------------------------------------------------------------
;
; EQUATES for ESAI_1 Registers
; register bit equates can be the same as for the ESAI register bit equates.
;
;------------------------------------------------------------------------
; Register Addresses
M_RSMB_1 EQU $FFFF9C
M_RSMA_1 EQU $FFFF9B
M_TSMB_1 EQU $FFFF9A
M_TSMA_1 EQU $FFFF99
M_RCCR_1 EQU $FFFF98
M_RCR_1 EQU $FFFF97
M_TCCR_1 EQU $FFFF96
M_TCR_1 EQU $FFFF95
M_SAICR_1 EQU $FFFF94
M_SAISR_1 EQU $FFFF93
M_RX3_1 EQU $FFFF8B
M_RX2_1 EQU $FFFF8A
M_RX1_1 EQU $FFFF89
M_RX0_1 EQU $FFFF88
M_TSR_1 EQU $FFFF86
M_TX5_1 EQU $FFFF85
M_TX4_1 EQU $FFFF84
M_TX3_1 EQU $FFFF83
M_TX2_1 EQU $FFFF82
M_TX1_1 EQU $FFFF81
M_TX0_1 EQU $FFFF80
;------------------------------------------------------------------------
;
; EQUATES for ESAI
;
;------------------------------------------------------------------------
; Register Addresses
M_RSMB EQU $FFFFBC
M_RSMA EQU $FFFFBB
M_TSMB EQU $FFFFBA
M_TSMA EQU $FFFFB9
M_RCCR EQU $FFFFB8
M_RCR EQU $FFFFB7
M_TCCR EQU $FFFFB6
M_TCR EQU $FFFFB5
M_SAICR EQU $FFFFB4
M_SAISR EQU $FFFFB3
M_RX3 EQU $FFFFAB
M_RX2 EQU $FFFFAA
M_RX1 EQU $FFFFA9
M_RX0 EQU $FFFFA8
M_TSR EQU $FFFFA6
M_TX5 EQU $FFFFA5
Freescale Semiconductor
; SHI Prescalar Rate Select (HRS)
; SHI Clock Polarity (CPOL)
; SHI Clock Phase (CPHA)
; Y space: ESAI_1 Receive Slot Mask Register B (RSMB_1)
; Y space: ESAI_1 Receive Slot Mask Register A (RSMA_1)
; Y space: ESAI_1 Transmit Slot Mask Register B (TSMB_1)
; Y space: ESAI_1 Transmit Slot Mask Register A (TSMA_1)
; Y space: ESAI_1 Receive Clock Control Register (RCCR_1)
; Y space: ESAI_1 Receive Control Register (RCR_1)
; Y space: ESAI_1 Transmit Clock Control Register (TCCR_1)
; Y space: ESAI_1 Transmit Control Register (TCR_1)
; Y space: ESAI_1 Control Register (SAICR_1)
; Y space: ESAI_1 Status Register (SAISR_1)
; Y space: ESAI_1 Receive Data Register 3 (RX3_1)
; Y space: ESAI_1 Receive Data Register 2 (RX2_1)
; Y space: ESAI_1 Receive Data Register 1 (RX1_1)
; Y space: ESAI_1 Receive Data Register 0 (RX0_1)
; Y space: ESAI_1 Time Slot Register (TSR_1)
; Y space: ESAI_1 Transmit Data Register 5 (TX5_1)
; Y space: ESAI_1 Transmit Data Register 4 (TX4_1)
; Y space: ESAI_1 Transmit Data Register 3 (TX3_1)
; Y space: ESAI_1 Transmit Data Register 2 (TX2_1)
; Y space: ESAI_1 Transmit Data Register 1 (TX1_1)
; Y space: ESAI_1 Transmit Data Register 0 (TX0_1)
; X space: ESAI Receive Slot Mask Register B (RSMB)
; X space: ESAI Receive Slot Mask Register A (RSMA)
; X space: ESAI Transmit Slot Mask Register B (TSMB)
; X space: ESAI Transmit Slot Mask Register A (TSMA)
; X space: ESAI Receive Clock Control Register (RCCR)
; X space: ESAI Receive Control Register (RCR)
; X space: ESAI Transmit Clock Control Register (TCCR)
; X space: ESAI Transmit Control Register (TCR)
; X space: ESAI Control Register (SAICR)
; X space: ESAI Status Register (SAISR)
; X space: ESAI Receive Data Register 3 (RX3)
; X space: ESAI Receive Data Register 2 (RX2)
; X space: ESAI Receive Data Register 1 (RX1)
; X space: ESAI Receive Data Register 0 (RX0)
; X space: ESAI Time Slot Register (TSR)
; X space: ESAI Transmit Data Register 5 (TX5)
DSP56374 Users Guide, Rev. 1.2
B-11