Freescale Semiconductor DSP56374 User Manual page 33

Signal Name Type
MODB/IRQB Input
PH1 Input, Output,
or
Disconnected
MODC/IRQC Input
PH2 Input, Output,
or
Disconnected
MODD/IRQD Input
PH3 Input, output,
or
disconnected
RESET Input
Freescale Semiconductor
Table 2-6. Interrupt and Mode Control (continued)
State during
Reset
MODB Mode Select B/External Interrupt Request B—MODB/IRQB is an
Input active-low Schmitt-trigger input, internally synchronized to the DSP clock.
MODB/IRQB selects the initial chip operating mode during hardware reset
and becomes a level-sensitive or negative-edge-triggered, maskable
interrupt request input during normal instruction processing. This pin can
also be programmed as GPIO. MODA, MODB, MODC, and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET
signal is de-asserted.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
Port H1—When the MODB/IRQB is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
MODC Mode Select C/External Interrupt Request C—MODC/IRQC is an
Input active-low Schmitt-trigger input, internally synchronized to the DSP clock.
MODC/IRQC selects the initial chip operating mode during hardware reset
and becomes a level-sensitive or negative-edge-triggered, maskable
interrupt request input during normal instruction processing. This pin can
also be programmed as GPIO. MODA, MODB, MODC, and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET
signal is de-asserted.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
Port H2—When the MODC/IRQC is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
MODD Mode Select D/External Interrupt Request D—MODD/IRQD is an
Input active-low Schmitt-trigger input, internally synchronized to the DSP clock.
MODD/IRQD selects the initial chip operating mode during hardware reset
and becomes a level-sensitive or negative-edge-triggered, maskable
interrupt request input during normal instruction processing. This pin can
also be programmed as GPIO. MODA, MODB, MODC, and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET
signal is de-asserted.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
Port H3—When the MODD/IRQD is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
Input Reset—RESET is an active-low, Schmitt-trigger input. When asserted, the
chip is placed in the Reset state and the internal phase generator is reset.
The Schmitt-trigger input allows a slowly rising input (such as a capacitor
charging) to reset the chip reliably. When the RESET signal is de-asserted,
the initial chip operating mode is latched from the MODA, MODB, MODC,
and MODD inputs. The RESET signal must be asserted during power up. A
stable EXTAL signal must be supplied while RESET is being asserted.
This pin has an internal pull-up resistor.
This input is 5 V tolerant.
DSP56374 Users Guide, Rev. 1.2
Interrupt and Mode Control
Signal Description
2-5