Port General Control Command And Status Register (Pgccsr) - Freescale Semiconductor MSC8144E Reference Manual

Quad core media signal processor
Table of Contents

Advertisement

®
Serial RapidIO
Controller

16.6.18 Port General Control Command and Status Register (PGCCSR)

PGCCSR
Port General Control Command and Status Register
Bit
31
30
29
H
M
D
TYPE
R/W
RESET
0
1
0
Bit
15
14
13
TYPE
RESET
0
0
0
PGCCSR contains control register bits for the RapidIO interface.
Note:
The user must initialize the value of M to 1. Otherwise, no outbound transactions are
initiated by the MSC8144E, including messages and doorbells.
Bit
Reset
H
0
31
M
1
30
D
0
29
0
28–0
16-122
28
27
26
25
0
0
0
0
12
11
10
9
0
0
0
0
Table 16-60. PGCCSR Field Descriptions
Description
Host
Determines the host/agent configuration for the
device. Notice that by default H = 0.
Initiator
The value of this bit is identical to that of
GCCSR[H], which is assigned by power-on reset
configuration signals. Setting M = 0 disables all
outbound transactions and prevents sending any
outbound packets.
Discovered
The value of this bit is identical to that of
GCCSR[H], which is assigned by power-on reset
configuration signals.
Reserved. Write to zero for future compatibility.
MSC8144E Reference Manual, Rev. 3
24
23
22
21
0
0
0
0
8
7
6
5
R
0
0
0
0
0
1
0
1
0
1
Offset 0x0013C
20
19
18
17
0
0
0
0
4
3
2
1
0
0
0
0
Settings
Agent device.
Host device.
Device is not enabled to send
requests to the system.
Device is enabled to send requests
to the system.
Device not discovered by system
host.
Device is discovered by system host.
Freescale Semiconductor
16
0
0
0

Advertisement

Table of Contents
loading

Table of Contents