Freescale Semiconductor DSP56374 User Manual page 255

Numerics
5 V tolerance 1
A
adder
modulo 4
offset 4
reverse-carry 4
address bus 1
Address Generation Unit 4
addressing modes 4
AGU 4
B
barrel shifter 3
block diagram
Clock Generator 6
Phase Locked Loop (PLL) 2
PLL clock generator 1
bus control 1
buses
internal 4
C
Central Processing Unit (CPU) i
charge pump loop filter 2
CLKGEN 5
Clock 4
clock 1
Clock divider 9
Clock Generator (CLKGEN) 5, 1, 6
clock input frequency division 2, 3
CPHA and CPOL (HCKR Clock Phase and Polarity Controls) 5
D
data ALU 3
registers 3
data bus 1
Data Input (DI) bit 22
Data Output (DO) bit 21
DAX 1, 16
Digital Audio Transmitter 1, 16
Direct Memory Access (DMA)
triggered by timer 18
Direction (DIR) bit 22
Divide Factor (DF) 5
DMA 5
DO loop 4
DSP56300 core 2
DSP56300 Family Manual i, 2
DSP56303 Technical Data i
E
Enhanced Serial Audio Interface 8, 12
Enhanced Synchronous Audio Interface 1
ESAI 1, 8, 12
ESAI block diagram 1
ESSI0 (GPIO) 1
ESSI1 (GPIO) 1, 3
EXTAL 2
Freescale Semiconductor
Index
F
Frequency Divider 3
frequency multiplication 3
frequency predivider 2
functional signal groups 1
G
Global Data Bus 5
GPIO 6
GPIO (ESSI0, Port C) 1
GPIO (ESSI1, Port D) 1, 3
GPIO (Timer) 4
Ground 3
ground 1
H
HA1, HA3-HA6 (HSAR I
hardware stack 4
HBER (HCSR Bus Error) 11
HBIE (HCSR Bus Error Interrupt Enable) 9
HBUSY (HCSR Host Busy) 11
HCKR (SHI Clock Control Register) 5
HCSR
Receive Interrupt Enable Bits 10
SHI Control/Status Register 7
HDI08 1
HDM0-HDM5 (HCKR Divider Modulus Select) 7
HEN (HCSR SHI Enable) 7
HFIFO (HCSR FIFO Enable Control) 8
HFM0-HFM1 (HCKR Filter Mode) 7
2
HI C (HCSR Serial Host Interface I
HIDLE (HCSR Idle) 9
HM0-HM1 (HCSR Serial Host Interface Mode) 8
HMST (HCSR Master Mode) 8
Host
Receive Data FIFO (HRX) 5
Receive Data FIFO—DSP Side 5
Transmit Data Register (HTX) 4
Transmit Data Register—DSP Side 4
Host Interface 1
HREQ Function In SHI Slave Modes 9
HRFF (HCSR Host Receive FIFO Full) 10
HRIE0-HRIE1 (HCSR Receive Interrupt Enable) 10
HRNE (HCSR Host Receive FIFO Not Empty) 10
HROE (HCSR Host Receive Overrun Error) 11
HRQE0-HRQE1 (HCSR Host Request Enable) 9
HTDE (HCSR Host Transmit Data Empty) 10
HTIE (HCSR Transmit Interrupt Enable) 9
HTUE (HCSR Host Transmit Underrun Error) 10
I
2
I C 7, 1, 11
Bit Transfer 12
Bus Protocol For Host Read Cycle 13
Bus Protocol For Host Write Cycle 13
Data Transfer Formats 13
Master Mode 15
Protocol for Host Write Cycle 13
Receive Data In Master Mode 16
DSP56374 Users Guide, Rev. 1.2
2
C Slave Address) 5
2
C/SPI Selection) 8
Index-1