Measurement Capture (Mode 6) - Freescale Semiconductor DSP56374 User Manual

24-bit digital signal
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Mode 5 (internal clock): TRM = 0
N = write preload
M = write compare
TE
Clock
(CLK/2 or prescale CLK)
TLR
Counter
TCR
TIO pin
TCF (Compare Interrupt if TCIE = 1)
NOTE: If INV = 1, a 1-to-0 edge on TIO loads the counter, and a 0-to-1 edge on TIO
loads TCR with count and the counter with N.
9.3.2.3

Measurement Capture (Mode 6)

Bit Settings
TC3
TC2
TC1
0
1
1
In Mode 6, the timer counts the number of clocks that elapse between when the timer starts and when an external signal is received. At the
first appropriate transition of the external clock detected on the TIO signal, TCSR[TCF] is set and, if the TCSR[TCIE] bit is set, a compare
interrupt is generated. The counter halts. The contents of the counter are loaded into the TCR. The value of the TCR represents the delay
between the setting of the TCSR[TE] bit and the detection of the first clock edge signal on the TIO signal. The value of the INV bit determines
whether a high-to-low (1 to 0) or low-to-high (0 to 1) transition of the external clock signals the end of the timing period. If the INV bit is set,
a high-to-low transition signals the end of the timing period. If INV is cleared, a low-to-high transition signals the end of the timing period.
Freescale Semiconductor
first event
N
0
N
period being measured
Figure 9-14. Period Measurement Mode, TRM = 0
Mode Characteristics
TC0
Mode
Name
0
6
Capture
DSP56374 Users Guide, Rev. 1.2
N + 1
M
M + 1
M
Function
Measurement
Operating Modes
Counter continues
counting, does
N + 1
not stop. Overflow
may occur (TOF=1).
Interrupt Service
reads TCR; period
= M - N clock
periods
TIO
Clock
Input
Internal
9-13

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