Interrupt Vector Addresses - Freescale Semiconductor DSP56374 User Manual

24-bit digital signal
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Table C-2. Internal I/O Memory Map (Y Memory) (continued)
Peripheral
ESAI_1
C.1.6

Interrupt Vector Addresses

Interrupt
Starting Address
VBA:$00
VBA:$02
VBA:$04
VBA:$06
VBA:$08
VBA:$0A
VBA:$0C
VBA:$0E
VBA:$10
Freescale Semiconductor
Address
Y:$FFFF9C
ESAI_1 RECEIVE SLOT MASK REGISTER B (RSMB_1)
Y:$FFFF9B
ESAI_1 RECEIVE SLOT MASK REGISTER A (RSMA_1)
Y:$FFFF9A
ESAI_1 TRANSMIT SLOT MASK REGISTER B (TSMB_1)
Y:$FFFF99
ESAI_1 TRANSMIT SLOT MASK REGISTER A (TSMA_1)
Y:$FFFF98
ESAI_1 RECEIVE CLOCK CONTROL REGISTER (RCCR_1)
Y:$FFFF97
ESAI_1 RECEIVE CONTROL REGISTER (RCR_1)
Y:$FFFF96
ESAI_1 TRANSMIT CLOCK CONTROL REGISTER (TCCR_1)
Y:$FFFF95
ESAI_1 TRANSMIT CONTROL REGISTER (TCR_1)
Y:$FFFF94
ESAI_1 COMMON CONTROL REGISTER (SAICR_1)
Y:$FFFF93
ESAI_1 STATUS REGISTER (SAISR_1)
Y:$FFFF92
RESERVED
Y:$FFFF91
RESERVED
Y:$FFFF90
RESERVED
Y:$FFFF8F
RESERVED
Y:$FFFF8E
RESERVED
Y:$FFFF8D
RESERVED
Y:$FFFF8C
RESERVED
Y:$FFFF8B
ESAI_1 RECEIVE DATA REGISTER 3 (RX3_1)
Y:$FFFF8A
ESAI_1 RECEIVE DATA REGISTER 2 (RX2_1)
Y:$FFFF89
ESAI_1 RECEIVE DATA REGISTER 1 (RX1_1)
Y:$FFFF88
ESAI_1 RECEIVE DATA REGISTER 0 (RX0_1)
Y:$FFFF87
RESERVED
Y:$FFFF86
ESAI_1 TIME SLOT REGISTER (TSR_1)
Y:$FFFF85
ESAI_1 TRANSMIT DATA REGISTER 5 (TX5_1)
Y:$FFFF84
ESAI_1 TRANSMIT DATA REGISTER 4 (TX4_1)
Y:$FFFF83
ESAI_1 TRANSMIT DATA REGISTER 3 (TX3_1)
Y:$FFFF82
ESAI_1 TRANSMIT DATA REGISTER 2 (TX2_1)
Y:$FFFF81
ESAI_1 TRANSMIT DATA REGISTER 1 (TX1_1)
Y:$FFFF80
ESAI_1 TRANSMIT DATA REGISTER 0 (TX0_1)
Table C-3. DSP56374 Interrupt Vectors
Interrupt Priority
Level Range
3
Hardware RESET
3
Stack Error
3
Illegal Instruction
3
Debug Request Interrupt
3
Trap
3
Non-maskable Interrupt (NMI)
3
Reserved For Future Level-3 Interrupt Source
3
Reserved For Future Level-3 Interrupt Source
0 - 2
IRQA
DSP56374 Users Guide, Rev. 1.2
Register Name
Interrupt Source
Introduction
C-7

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