Watchdog Modes; Watchdog Pulse (Mode 9) - Freescale Semiconductor DSP56374 User Manual

Operating Modes
Mode 7 (internal clock): TRM = 0
N = write preload
M = write compare
TE
Clock
(CLK/2 or prescale CLK)
TLR
Counter (TCR)
TCPR
TCF (Compare Interrupt if TCIE = 1)
TCF (Overflow Interrupt if TDIE = 1)
TIO pin (INV = 0)
TIO pin (INV = 1)
NOTE: On overflow, TCR is loaded with the value of TLR.
Figure 9-17. Pulse Width Modulation Toggle Mode, TRM = 0
9.3.4

Watchdog Modes

The following watchdog timer modes are provided:
• Watchdog Pulse
• Watchdog Toggle
9.3.4.1

Watchdog Pulse (Mode 9)

Bit Settings
TC3 TC2 TC1
1 0 0
In Mode 9, the timer generates an external signal at a preset rate. The signal period is equal to the period of one timer clock. After the counter
reaches the value in the TCPR, if the TCSR[TRM] bit is set, the counter is loaded with the TLR value on the next timer clock and the count
resumes. Therefore TRM = 1 is not useful for watchdog functions. If the TCSR[TRM] bit is cleared, the counter continues to increment on
9-16
first event
N
0
N
M
Pulse width
Period
Mode Characteristics
TC0 Mode
1 9
DSP56374 Users Guide, Rev. 1.2
Period = $FFFFFF - TLR + 1
Duty cycle = ($FFFFFF - TCPR)
Ensure that TCPR > TLR for correct functionality
M M + 1 0
Name Function
Pulse Watchdog
1 2
TIO Clock
Output Internal
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