Shi Operation During Dsp Stop; Gpio- Hreq Signal And Registers - Freescale Semiconductor DSP56374 User Manual

7.7.5

SHI Operation During DSP Stop

The SHI operation cannot continue when the DSP is in the stop state, because no DSP clocks are active. While the DSP is in the stop state,
the SHI remains in the individual reset state.
While in the individual reset state the following is true:
• If the SHI was operating in the I
• If the SHI was operating in the SPI mode, the SHI signals are not affected.
• The HCSR status bits and the transmit/receive paths are reset to the same state produced by hardware reset or software reset.
• The HCSR and HCKR control bits are not affected.
It is recommended that the SHI be disabled before entering the stop state.
7.7.6

GPIO- HREQ Signal and Registers

Note that the HREQ pin can also be programmed as a GPIO. See
Freescale Semiconductor
2
C mode, the SHI signals are disabled (high impedance state).
NOTE
Section 6.2.3, Port H Signals and Registers.
DSP56374 Users Guide, Rev. 1.2
SHI Programming Considerations
7-17