Hitachi H8/329 Series Hardware Manual page 283

Table A-1. Instruction Set (cont.)
Mnemonic
SHAL.B Rd B
2
SHAR.B Rd B
2
SHLL.B Rd B
2
SHLR.B Rd B
2
ROTXL.B Rd B
2
ROTXR.B Rd B
2
ROTL.B Rd B
2
ROTR.B Rd B
2
B (#xx:3 of Rd8) ← 1
BSET #xx:3,Rd
2
B (#xx:3 of @Rd16) ← 1
BSET #xx:3,@Rd
8
B (#xx:3 of @aa:8) ← 1
BSET #xx:3,@aa:8
8
B (Rn8 of Rd8) ← 1
BSET Rn,Rd
2
B (Rn8 of @Rd16) ← 1
BSET Rn,@Rd
8
Operation
C 0
b b
7 0
C
b b
7 0
C 0
b
b
7 0
0 C
b
b
0
7
C 0
b b
7 0
C
b
b
0
7
C 0
b b
7 0
C
b b
7 0
274
Addressing mode/
instruction length
Condition code
I H N Z V C
2 –
2 –
2 –
2 –
2 –
2 –
2 –
2 –
2 –
4 –
4 –
2 –
4 –
– ◊ ◊ ◊ ◊
– ◊ ◊ ◊
0
– ◊ ◊ ◊
0
◊ ◊
– 0 0
– ◊ ◊ ◊
0
– ◊ ◊ ◊
0
– ◊ ◊ ◊
0
– ◊ ◊ ◊
0
– – – – –
– – – – –
– – – – –
– – – – –
– – – – –