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6.7 Application Notes
Application programmers should note that the following types of contention can occur in the free-
running timers.
(1) Contention between FRC Write and Clear: If an internal counter clear signal is generated
during the T
state of a write cycle to the lower byte of the free-running counter, the clear signal
3
takes priority and the write is not performed.
Figure 6-18 shows this type of contention.
Ø
Internal address bus
Internal write signal
FRC clear signal
FRC
Write cycle: CPU write to lower byte of FRC
T
1
N
Figure 6-18. FRC Write-Clear Contention
138
T
T
2
3
FRC address
H'0000
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