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Before Execution of BCLR Instruction
P4
7
Input/output
Input
Pin state
Low
DDR
0
DR
1
Execution of BCLR Instruction
BCLR
#0, @P4DDR
After Execution of BCLR Instruction
P4
7
Input/output
Output Output Output Output Output Output Output Input
Pin state
Low
DDR
1
DR
1
Explanation: To execute the BCLR instruction, the CPU begins by reading P4DDR. Since
P4DDR is a write-only register, it is read as H'FF, even though its true value is H'3F.
Next the CPU clears bit 0 of the read data, changing the value to H'FE.
Finally, the CPU writes this value (H'FE) back to P4DDR to complete the BCLR instruction.
As a result, P4
DDR is cleared to "0," making P4
0
are set to "1," making P4
P4
P4
P4
6
5
4
Input
Output Output Output Output Output Output
High
Low
Low
0
1
1
0
0
0
;clear bit 0 in data direction register
P4
P4
P4
6
5
4
High
Low
Low
1
1
1
0
0
0
and P4
output pins.
7
6
P4
P4
P4
3
2
Low
Low
Low
1
1
1
0
0
0
P4
P4
P4
3
2
Low
Low
Low
1
1
1
0
0
0
an input pin. In addition, P4
0
45
P4
1
0
Low
1
0
P4
1
0
High
0
0
DDR and P4
DDR
7
6
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