Hitachi H8/329 Series Hardware Manual page 267

Table 14-6. Bus Timing
Condition A: V = 5.0V ±10%, V
CC
Ta = –20 to 75˚C (regular specifications),
Ta = –40 to 85˚C (wide-range specifications)
Condition B: V = 3.0V ±10%, V
CC
Ta = –20 to 75˚C
Item
Clock cycle time
Clock pulse width Low
Clock pulse width High
Clock rise time
Clock fall time
Address delay time
Address hold time
Address strobe delay time
Write strobe delay time
Strobe delay time
Write strobe pulse width*
Address setup time 1*
Address setup time 2*
Read data setup time
Read data hold time
Read data access time*
Write data delay time
Write data setup time
Write data hold time
Wait setup time
Wait hold time
Note: * Values at maximum operating frequency
= 0V, Ø = 0.5MHz to maximum operating frequency,
SS
= 0V, Ø = 0.5MHz to maximum operating frequency,
SS
Condition B
5MHz
Symbol Min Max Min Max Min Max Min Max Unit conditions
t 200 2000 166.7 2000 125
cyc
t 70 – 65
CL
t 70 – 65
CH
t – 25 –
Cr
t – 25 –
Cf
t – 90 –
AD
t 30 – 30
AH
t – 80 –
ASD
t – 80 –
WSD
t – 90 –
SD
t 200 – 200
WSW
t 25 – 25
AS1
t 105 – 105
AS2
t 90 – 70
RDS
t 0 – 0
RDH
t – 300 –
ACC
t – 125 –
WDD
t 10 – 20
WDS
t 30 – 30
WDH
t 60 – 40
WTS
t 20 – 10
WTH
258
Condition A
6MHz 8MHz 10MHz
2000 100
– 45 – 35
– 45 – 35
15 – 15 –
15 – 15 –
70 – 60 –
– 25 – 20
70 – 60 –
70 – 60 –
70 – 60 –
– 150 – 120
– 20 – 15
– 80 – 65
– 50 – 35
– 0 – 0
270 – 210 –
85 – 75 –
– 10 – 5
– 25 – 20
– 40 – 40
– 10 – 10
Measurement
2000 ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
15 ns Fig. 14-4
15 ns Fig. 14-4
50 ns Fig. 14-4
– ns Fig. 14-4
40 ns Fig. 14-4
50 ns Fig. 14-4
50 ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
170 ns Fig. 14-4
75 ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-4
– ns Fig. 14-5
– ns Fig. 14-5