Hitachi H8/329 Series Hardware Manual page 7

9.2.3 A/D Control Register (ADCR)-H'FFEA............................................................... 215
9.3 Operation .............................................................................................................................. 215
9.3.1 Single Mode (SCAN = 0) ........................................................................................ 216
9.3.2 Scan Mode (SCAN = 1) .......................................................................................... 219
9.3.3 Input Sampling Time and A/D Conversion Time.................................................... 222
9.3.4 External Trigger Input Timing................................................................................. 223
9.4 Interrupts............................................................................................................................... 224
Section 10. RAM
....................................................................................................................... 225
10.1 Overview............................................................................................................................... 225
10.2 Block Diagram...................................................................................................................... 225
10.3 RAM Enable Bit (RAME) in System Control Register (SYSCR) ....................................... 225
10.4 Operation .............................................................................................................................. 226
10.4.1 Expanded Modes (Modes 1 and 2) .......................................................................... 226
10.4.2 Single-Chip Mode (Mode 3) ................................................................................... 226
Section 11. ROM
....................................................................................................................... 227
11.1 Overview............................................................................................................................... 227
11.1.1 Block Diagram......................................................................................................... 228
11.2 PROM Mode (H8/329, H8/327) ........................................................................................... 228
11.2.1 PROM Mode Setup ................................................................................................. 228
11.2.2 Socket Adapter Pin Assignments and Memory Map............................................... 229
11.3 Programming ........................................................................................................................ 232
11.3.1 Writing and Verifying .............................................................................................. 232
11.3.2 Notes on Writing...................................................................................................... 236
11.3.3 Reliability of Written Data ...................................................................................... 236
11.3.4 Erasing of Data ........................................................................................................ 237
11.4 Handling of Windowed Packages......................................................................................... 238
Section 12. Power-Down State
12.1 Overview............................................................................................................................... 239
12.2 System Control Register: Power-Down Control Bits ........................................................... 240
12.3 Sleep Mode ........................................................................................................................... 241
12.3.1 Transition to Sleep Mode......................................................................................... 242
12.3.2 Exit from Sleep Mode ............................................................................................. 242
12.4 Software Standby Mode........................................................................................................ 242
12.4.1 Transition to Software Standby Mode..................................................................... 243
12.4.2 Exit from Software Standby Mode.......................................................................... 243
.............................................................................................. 239
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