Hitachi HD6433288VF Manuals

Manuals and User Guides for Hitachi HD6433288VF. We have 1 Hitachi HD6433288VF manual available for free PDF download: Hardware Manual

Hitachi HD6433288VF Hardware Manual

Hitachi HD6433288VF Hardware Manual (328 pages)

SINGLE-CHIP MICROCOMPUTER

Brand: Hitachi | Category: Computer Hardware | Size: 1.46 MB

Table of Contents

3
Table of Contents
10
Section 1. Overview
10
Overview
14
Block Diagram
15
Pin Assignments and Functions
- 15
  Pin Arrangement
- 18
  Pin Functions
24
Section 2. MCU Operating Modes and Address Space
24
Overview
- 24
  Mode Selection
- 25
  Mode and System Control Registers (MDCR and SYSCR)
25
System Control Register (SYSCR)-H'FFC4
27
Mode Control Register (MDCR)-H'FFC5
28
Address Space Maps
32
Section 3. CPU
32
Overview
- 32
  Features
33
Register Configuration
- 33
  General Registers
- 34
  Control Registers
- 35
  Initial Register Values
36
Addressing Modes
- 36
  Addressing Mode
- 38
  How to Calculate Where the Execution Starts
42
Data Formats
- 43
  Data Formats in General Registers
- 44
  Memory Data Formats
45
Instruction Set
- 47
  Data Transfer Instructions
- 49
  Arithmetic Operations
- 50
  Logic Operations
- 50
  Shift Operations
- 52
  Bit Manipulations
- 56
  Branching Instructions
- 58
  System Control Instructions
- 59
  Block Data Transfer Instruction
60
CPU States
- 61
  Program Execution State
- 61
  Exception-Handling State
- 62
  Power-Down State
62
Access Timing and Bus Cycle
- 62
  Access to On-Chip Memory (RAM and ROM)
- 64
  Access to On-Chip Register Field and External Devices
68
Section 4. Exception Handling
68
Overview
68
Reset
- 68
  Reset Sequence
- 71
  Disabling of Interrupts after Reset
71
Interrupts
- 71
  Overview
- 73
  Interrupt-Related Registers
- 75
  External Interrupts
- 76
  Internal Interrupts
- 76
  Interrupt Handling
- 81
  Interrupt Response Time
- 81
  Precaution
82
Note on Stack Handling
84
Section 5. I/O Ports
84
Overview
86
Port 1
89
Port 2
93
Port 3
97
Port 4
105
Port 5
109
Port 6
120
Port 7
122
Section 6. 16-Bit Free-Running Timer
122
Overview
- 122
  Features
- 123
  Block Diagram
- 124
  Input and Output Pins
- 124
  Register Configuration
125
Register Descriptions
- 125
  Free-Running Counter (FRC)-H'FF92
- 126
  Output Compare Registers a and B (OCRA and OCRB)-H'FF94
- 126
  Input Capture Registers a to D (ICRA to ICRD)-H'FF98, H'FF9A, H'FF9C, H'FF9E
- 129
  Timer Interrupt Enable Register (TIER)-H'FF90
- 131
  Timer Control/Status Register (TCSR)-H'FF91
- 134
  Timer Control Register (TCR)-H'FF96
- 136
  Timer Output Compare Control Register (TOCR)-H'FF97
137
CPU Interface
139
Operation
- 139
  FRC Incrementation Timing
- 141
  Output Compare Timing
- 142
  Input Capture Timing
- 145
  Setting of FRC Overflow Flag (OVF)
146
Interrupts
146
Sample Application
147
Application Notes
152
Section 7. 8-Bit Timers
152
Overview
- 152
  Features
- 152
  Block Diagram
- 153
  Input and Output Pins
- 154
  Register Configuration
154
Register Descriptions
- 154
  Timer Counter (TCNT)-H'FFCC (TMR0), H'FFD4 (TMR1)
- 155
  Time Constant Registers a and B (TCORA and TCORB)- H'FFCA and H'FFCB (TMR0), H'FFD2 and H'FFD3 (TMR1)
- 155
  Timer Control Register (TCR)-H'FFC8 (TMR0), H'FFD0 (TMR1)
- 158
  Timer Control/Status Register (TCSR)-H'FFC9 (TMR0), H'FFD1 (TMR1)
- 160
  Serial/Timer Control Register (STCR)-H'FFC3
161
Operation
- 161
  TCNT Incrementation Timing
- 162
  Compare Match Timing
- 164
  External Reset of TCNT
- 165
  Setting of TCSR Overflow Flag (OVF)
166
Interrupts
166
Sample Application
167
Application Notes
172
Section 8. Serial Communication Interface
172
Overview
- 172
  Features
- 173
  Block Diagram
- 174
  Input and Output Pins
- 174
  Register Configuration
175
Register Descriptions
- 175
  Receive Shift Register (RSR)
- 175
  Receive Data Register (RDR)-H'FFDD
- 175
  Transmit Shift Register (TSR)
- 176
  Transmit Data Register (TDR)-H'FFDB
- 176
  Serial Mode Register (SMR)-H'FFD8
- 179
  Serial Control Register (SCR)-H'FFDA
- 183
  Serial Status Register (SSR)-H'FFDC
- 186
  Bit Rate Register (BRR)-H'FFD9
- 190
  Serial/Timer Control Register (STCR)-H'FFC3
191
Operation
- 191
  Overview
- 193
  Asynchronous Mode
- 206
  Clocked Synchronous Operation
215
SCI Interrupts
215
Application Notes
218
Section 9. A/D Converter
218
Overview
- 218
  Features
- 219
  Block Diagram
- 220
  Input Pins
- 220
  Register Configuration
221
Register Descriptions
- 221
  A/D Data Registers (ADDR)-H'FFE0 to H'FFE6
- 221
  A/D Control/Status Register (ADCSR)-H'FFE8
- 224
  A/D Control Register (ADCR)-H'FFEA
225
Operation
- 225
  Single Mode (SCAN = 0)
- 228
  Scan Mode (SCAN = 1)
- 231
  Input Sampling Time and A/D Conversion Time
- 232
  External Trigger Input Timing
233
Interrupts
234
Section 10. RAM
234
Overview
234
Block Diagram
234
RAM Enable Bit (RAME) in System Control Register (SYSCR)
235
Operation
- 235
  Expanded Modes (Modes 1 and 2)
- 235
  Single-Chip Mode (Mode 3)
236
Section 11. ROM
236
Overview
- 237
  Block Diagram
237
PROM Mode (H8/329, H8/327)
- 237
  PROM Mode Setup
- 238
  Socket Adapter Pin Assignments and Memory Map
241
Programming
- 241
  Writing and Verifying
- 245
  Notes on Writing
- 245
  Reliability of Written Data
- 246
  Erasing of Data
247
Handling of Windowed Packages
248
Section 12. Power-Down State
248
Overview
249
System Control Register: Power-Down Control Bits
251
Sleep Mode
- 251
  Transition to Sleep Mode
- 251
  Exit from Sleep Mode
251
Software Standby Mode
- 252
  Transition to Software Standby Mode
- 252
  Exit from Software Standby Mode
- 252
  Sample Application of Software Standby Mode
- 253
  Application Note
254
Hardware Standby Mode
- 254
  Transition to Hardware Standby Mode
- 254
  Recovery from Hardware Standby Mode
- 255
  Timing Relationships
256
Section 13. Clock Pulse Generator
256
Overview
- 256
  Block Diagram
256
Oscillator Circuit
259
System Clock Divider
260
Section 14. Electrical Specifications
260
Absolute Maximum Ratings
260
Electrical Characteristics
- 260
  DC Characteristics
- 266
  AC Characteristics
- 270
  A/D Converter Characteristics
271
MCU Operational Timing
- 271
  Bus Timing
- 272
  Control Signal Timing
- 275
  16-Bit Free-Running Timer Timing
- 276
  8-Bit Timer Timing
- 277
  Serial Communication Interface Timing
- 278
  I/O Port Timing
280
Appendix A. CPU Instruction Set
280
Instruction Set List
287
Operation Code Map
289
Number of States Required for Execution
295
Appendix B. Register Field
295
Register Addresses and Bit Names
299
Register Descriptions

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