Hitachi H8/329 Series Hardware Manual page 230

Single-chip microcomputer
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ADST
ADF
Channel 0 (AN
)
Waiting
0
Channel 1 (AN
)
1
Channel 2 (AN
)
2
Channel 3 (AN
)
3
ADDRA
ADDRB
ADDRC
ADDRD
Notes:
*1
indicates execution of a software instruction
Data undergoing conversion when ADST bit is cleared are ignored.
*2
Figure 9-3. A/D Operation in Scan Mode (when Channels 0 to 2 are Selected)
* 1
Set
A/D conver-
sion
A/D conver-
Waiting
sion
Waiting
Transfer
Continuous A/D conversion
A/D conversion
time
A/D conver-
Waiting
sion
Waiting
A/D conver-
sion
Waiting
A/D conver-
sion result
Clear
* 1
Clear
Waiting
* 2
A/D conver-
Waiting
sion
Waiting
A/D conversion result
A/D conversion result
A/D conversion result
* 1

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